1 FPGA New project development：FPGA architecture design♩♪✿♬❉☴, FPGA logic design♩♪✿♬❉☴, FPGA RTL coding♩♪✿♬❉☴, synthesis，simulation♩♪✿♬❉☴, project verification.
2 Existing FPGA code maintainance and optimization：Maintainance and optimize the existing code♩♪✿♬❉☴, optimize algorithms♩♪✿♬❉☴, upgrade code to support hardware updating.
3 DMR documentaion writing：Generation DMR documents according to QA requirement.
1 Ph.D or master degree with minimum 5 years experience in FPGA development.
2 Proven experience on FPGA development♩♪✿♬❉☴, especially experience on large FPGA design project.
3 Proven experience on DSP algorithm design and implementation♩♪✿♬❉☴, optimization and validation on FPGA.
4 Familiar with up to date FPGA development tools and also FPGAs.
5 Proven experience on FPGA IP integration♩♪✿♬❉☴, system simulation and debug.
6 In-depth knowledge about processor interfaces♩♪✿♬❉☴, high speed interfaces (DDR♩♪✿♬❉☴, PCI-E♩♪✿♬❉☴, VME).
7 Majored in wireless communication or DSP is a plus.
1 Design & implementation of digital programmable logic (CPLD♩♪✿♬❉☴, FPGA) with VHDL or Verilog.
2 Familiar with FPGA design tools: Synplify♩♪✿♬❉☴, Vivado♩♪✿♬❉☴, ISE♩♪✿♬❉☴, Quartus.
3 Familiar with Xilinx/Altera FPGA architecture.
4 Hands-on experience in Ethernet/PCIe/DDR3/DDR4 emulation 5.Experience with simulation tools and debug process.
Quality Requirements :
1 Fluent in Chinese and English both verbal and written.
2 Good communication and problem solving skills.
3 Open minded♩♪✿♬❉☴, willing to collect and share information to solve problems 4.Responsible and committed♩♪✿♬❉☴, result oriented.